A. Field of the Invention
The present invention relates generally to two-way communication and control systems, and, more particularly, to communication and control systems of the type disclosed in the above identified related applications wherein a communication and control network provides communication between a variety of controlled devices such as circuit breakers, motor starters, protective relays, remote load controllers, lighting systems, and the like, to communicate with and be controlled by a central or master controller over a common network line.
B. Description of the Prior Art
In the communication and control system disclosed in the above identified related applications control and monitoring is carried out over a network consisting of either the existing power lines or dedicated twisted pair wires. The hardware based digital integrated circuit described in detail in the above-identified related applications forms the basic building block for such a communication and control network. This digital IC is a 28 pin semi-custom integrated circuit implemented by complementary metal oxide semiconductor CMOS technique which provides a simple, low cost interface to the communication and control network. This digital IC, which may also be referred to as an industrial communication (INCOM) integrated circuit, or chip, provides the network interface functions of address recognition, detection and storage of an ON-OFF keyed carrier multi-bit message received from the network, carrier generation and transmission of an ON-OFF keyed carrier message to the network in accordance with information stored therein, generation and checking of a five bit BCH error checking code, and framing of the received and transmitted messages.
The digital IC, or INCOM chip, may be configured for one of three operating modes: stand-alone slave, expanded-mode slave, and expanded-mode master. Arbitration of the network is accomplished in a master-slave fashion. The stand-alone slave mode is used by simple devices and provides control of a single output line and the return of two status bits from the slave device. The expanded-mode slave is used to interface microprocessor based equipment to the network and will support far more complex communications between the master and expanded-mode slave. In the expanded-mode master configuration the INCOM device may be used as a direct interface to the master or central computer of the network. However, this master computer must comprise a dedicated computer in order to ensure that messages will not be lost in transmission between an expanded-slave and the master computer. For example, the master computer may send a request to an expanded-mode slave asking for a block of data which will require several 33 bit messages to be sent back to the master. The expanded-mode slave will respond by sending these messages one right after the other. Each 33 bit message will be stored in the shift register of the INCOM chip. However, the entire message must be shifted out of the INCOM shift register during one bit time since otherwise the first bit of the next message may be lost and the next message garbled. Accordingly, when the INCOM chip is used as a direct interface to the network master computer, this computer must necessarily be a dedicated computer in order to guarantee the ability to respond to an interrupt signal from the INCOM chip by shifting out the contents of its shift register within one bit time.
Other bidirectional communication and control systems have also required the use of a dedicated computer as the master computer or controller of the network. For example, in Miller et U.S. Pat. No. 4,367,414 a dedicated computer is interfaced directly to the network by means of a simple interface arrangement which does not involve buffer storage of any kind in the interface.
In Schlotterer application Ser. No. 769,640 filed on Aug. 26, 1985 there is disclosed a hardware interface by means of which a general purpose computer, which may be a personal computer, such as an IBM PC or XT, may be interfaced to such a communication and control network and act as the central or master controller therefore. This hardware interface includes a receive buffer register into which the contents of the INCOM shift register may be rapidly loaded so that the first bit of a succeeding message on the network will not be lost. An interrupt signal is then sent to the processor means of the general purpose computer indicating that a received message has been stored in the interface and can now be read out. The general purpose computer can respond to this interrupt signal and read the message stored in the interface receive buffer at any time during the next 33 bit message while this next message is being stored in the INCOM shift register. After the general purpose computer has read the first message from the interface receive buffer it releases this buffer for storage of the next message from the network by sending a control signal to the hardware interface.
The master hardware interface of the Schlotterer application also includes a transmit buffer register into which the general purpose computer can write a message intended for the network. The interface responds to an initial transmit signal from the general purpose computer by serializing the message written into the transmit buffer register and loading it into the shift register of the INCOM chip when it is available. During this period the hardware-interface produces a status signal which can be read by the general purpose computer so that it will not load a second message into the transmit buffer while the first message is being read out and loaded into the INCOM shift register. Also, as soon as the first message has been loaded into the INCOM chip, the interface supplies an interrupt signal to the general purpose computer so that it can write a second message into the transmit buffer register while the first message is being transmitted over the network by the INCOM device at the relatively low baud rate of the network.